8bit signed arithmetic (8051)

Hey all,
My teacher and I are having a slight dispute (in good taste). He gave us the following code to analyze (it adds 5 to itself 50 times):

ORG 0H
MOV PSW, #00
MOV A, #0
MOV R1 , #50
Loop: ADD A, #5
DJNZ R1, Loop
END

Keep in mind that the 8051 is 8bit.
The question he posed was whether or not we have overflow upon the termination of this loop. Everyone in class including myself said yes. He went on to explain that at the 26th iteration we have 125+5 = 130 which is greater than 127. Therefore the OV bit is set to 1 for that iteration. Again I agreed.
He then said that the OV bit is 1 after termination of this loop. I disagreed. I've attached a table (PDF) that shows why the OV bit is 0 after termination of this loop. After the 26th iteration the value in the accumulator is -126. -126 + 5 = -121 which is a valid addition and does not result in an overflow. During the 50th iteration we have -11+5=-6 which is also valid and does not result in an overflow.

I think the determination here is that upon termination of the loop, we get in incorrect result because of overflow, but that overflow happened at iteration 26.
So, what do you think? Is the OV bit 0 or 1 after execution of this loop? I'm 99.9% sure I'm right, but I want to know for sure.

Thanks all,
Lunchbox